Solid state radiation detectors are known in the art, and provide a useful mechanism for detecting radiation. Such detectors have evolved from detectors using surface barrier electrodes, to ion-implanted electrodes.
Descriptions of such detectors and their uses may be found in applicant's article "A Proposed VLSI Pixel Device for Particle Detection", Nucl. Instr. and Meth. A275, 494 (1989), A342 59-77 (1994), and in U.S. Pat. Nos. 4,593,381, 5,237,197, 5,355,013, 5,461,653 and 5,465,002, among other references.
FIG. 1 depicts such a prior art radiation detector 10, which is more fully disclosed in U.S. Pat. No. 5,237,197 (in which applicant herein is co-inventor). In FIG. 1, a detector array 10 includes a preferably lightly doped P-type charge depletable substrate 20, having first and second surfaces 30 and 40 spaced-apart by a substrate thickness L of perhaps a few hundred microns. Substrate thicknesses in this range provide good sensitivity for collecting radiation-generated charge from within the substrate, as well as providing acceptable voltage breakdown levels, and protection from radiation damage.
Adjacent the first substrate surface 30 voltage-biasable doped well regions 50 of preferably N-type material are formed. Buffer well region 55 is formed of N-type or P-type material, depending upon the nature of the circuitry 60 in this well region. Well regions 50, 55 preferably are sufficiently highly doped to act as an electrostatic shield for underlying regions of the detection device. Electronics 60 may be fabricated within buffer well region 55.
Also adjacent first substrate surface 30 and separated from each other by the N-type well regions 50 are formed spaced-apart collection electrodes 70, preferably made from highly doped P-type material. Preferably the gate lead of one (or more than one) metal-oxide-semiconductor ("MOS") transistor 80 is coupled to each collection electrode 70. The lower surface of the substrate includes a preferably heavily doped N-diffusion region 90, beneath which is an electrode (not shown), and isolation regions 100. Of course, the conductivity types of the materials used to form detector 10 could be reversed, e.g., substituting P-type for N-type and vice versa.
One collection electrode 70, its associated MOS device 80, and indeed the associated underlying semiconductor structure may collectively be termed a "pixel", and the terms pixel and detector may be used interchangeably. It is seen from FIG. 1 that P-type collection electrodes 70 and P-type substrate 20 form a plurality of PN diode junctions with the N-type well regions 50 adjacent the first surface.
In practice, a well bias voltage of many volts is coupled between the collection electrode regions and bottom regions and N-doped well regions. The resultant electric fields extend from the second surface 40 toward and to the first surface 30. The resultant depletion region extends through the perhaps 300 .mu.m thickness of the substrate, whereupon a plurality of P-I-N diodes are formed by P-type collection regions 60, intrinsic substrate region 20, and N-type region 90.
The biasing causes force lines to emanate from the N-diffusion region 90 through the substrate thickness and focus upon the P-type collection electrodes 70. Incoming radiation (not shown) releases charge within the substrate, which charge is focused by the force lines and caused to be collected by the electrodes 70. As noted, N-wells 50 further serve as a Faraday shield for the array of pixels in structure 10. As noted, well regions 50, 55 can also serve as areas in which electronics are fabricated. Unfortunately, CMOS electronics that require wells of both dopant conductivity types can present a problem. Such CMOS electronics can be accommodated in the area over the active detection region, providing wells of like-conductivity type as the collection electrodes are implanted completely within wells of the opposite conductivity type. Understandably, if same-type wells were to be formed directly on the depleted silicon substrate, the wells would collect ionization charge on the substrate, which charges would not be collected and detected by the collection electrodes and assorted circuitry.
But as noted in the U.S. Pat. No. 5,237,197 patent, detector 10 can nonetheless function reasonably well because the wells surrounding the collection electrodes were doped with opposite type dopant and were back-biased relative to the collection electrodes. This configuration caused electric field lines to be directed to carry one sign of ionization charge from the substrate and the well to the collection electrodes. Like-signal wells, needed for CMOS electronics, were placed along the structure edges, beyond the sensitive detection area. Even though only perhaps 10% of upper surface 30 may be covered by collection electrodes, efficiency in the sensitive regions is extremely high with more than 99.99% of the radiation-induced charges being collected by electrodes 70. The collection electrodes preferably are uniformly distributed in a two-dimensional array on the surface, to provide resultant uniform array sensitivity and spatial resolution.
Once the radiation-induced charge has been collected by the collection electrodes 70, the transfer to an associated MOS device(s) can be rapid as the distance is now but a few microns. Further, because there is small capacitance (C) at the MOS gate, the charge (q) developed by the incoming X-ray radiation can produce a substantial voltage signal (v), since v.apprxeq.q/C. Electronics 60 may be used to signal process the charge associated with the MOS devices. For example the collected charge at a MOS gate may be used to modulate readout current caused to flow through the MOS device. Such readout may be made on an addressable row-column basis.
As noted, radiation detection sensitivity for prior art detector 10 can be very high. But radiation-induced charge cannot be detected until it has been collected by the surface-located collection electrodes 70. Unfortunately the collection or drift path that released charge must traverse before being collected can be very long, e.g., comparable to the few hundred micron full substrate thickness. Of course should some radiation-generated charge happen to be released closer to the collection electrode surface, collection of the charge can occur in a shorter time. In practice, prior art detectors using two-dimensional electrodes such as shown in FIG. 1, or the common silicon strip technology that preceded what is shown in FIG. 1, may take upwards of 25 ns for charge-produced signals to return to a baseline level from a peak. Of course, amplifier delays may extend this time even further.
Attempting to reduce radiation detection time by using a thinner substrate is counter productive because thinner substrates have shorter tracks, and therefor less signal charge. Also, thinner materials can break more readily during fabrication. It would also be desirable to provide a detector structure that is kept small in size in the presence of radiation damage, requiring a smaller voltage magnitude to achieve depletion, while still preventing so-called bulk type-reversals. Finally, in many detection environments it is necessary to continuously refrigerate the detector, even for maintenance.
Thus, there is a need for a sensitive solid state radiation detector having improved detection response times. Such detector should also provide good voltage breakdown, not require excessively high depletion voltages, and exhibit good radiation damage resistance characteristics. Further, such detector should permit implementing a monolithic combination of collection electrodes and CMOS electronics, without thereby hindering collection of released charge. Finally, such a detector should function without the need for operation at low temperatures.
The present invention provides such a detector, and a method for its fabrication.